Arm Introduces TLBID Support in Linux Kernel to Enhance High-Core CPU Performance

Arm has submitted an initial set of patches to the Linux kernel to introduce support for the upcoming TLBI Domains (TLBID) feature. This technology is designed to enhance the performance of large multi-core Arm systems by reducing the system overhead associated with TLB (Translation Lookaside Buffer) invalidation operations.

The TLB is a crucial processor structure that caches virtual-to-physical address translation results. When an operating system needs to invalidate certain address mappings, it typically sends TLB invalidation commands to multiple CPU cores. In systems with a high number of cores, performing a full system invalidation each time can lead to significant synchronization and communication overhead.

The core change with TLBID allows the operating system to issue TLB invalidation commands to only specific CPU cores, rather than invalidating the entire system. This mechanism is primarily targeted at high-core count Arm server processors. For server workloads running across numerous CPU cores, avoiding unnecessary system-wide TLB invalidations can reduce inter-processor synchronization costs.

Arm has not yet released specific performance test data for TLBID. Full support also requires corresponding instruction support from the ARM64 architecture's toolchain, with current work relying on LLVM 23 or later, and GNU Binutils 2.46 or later. These patches are currently in an early development phase.