Former Intel CEO Criticizes HBM Memory
Former Intel CEO Pat Gelsinger has strongly criticized High Bandwidth Memory (HBM). He described it as a poor solution for certain computing tasks, citing issues with density and thermal management.
Former Intel CEO Pat Gelsinger has sharply criticized High Bandwidth Memory (HBM), labeling it "terrible memory." Gelsinger pointed to issues such as low bit density, limited cooling capabilities, and constrained "shoreline bandwidth" as significant drawbacks affecting data transfer between memory and processors.
According to Gelsinger, these limitations make HBM particularly problematic for memory-intensive workloads like artificial intelligence (AI). He stated that the concentration of data in a single location creates thermal challenges, as DRAM memory dislikes high temperatures, rendering HBM "catastrophic" for AI and similar applications.
The technical challenges extend to the physical implementation of HBM. The high data throughput necessitates numerous connections and micro-bumps, increasing heat generation. Furthermore, the use of through-silicon vias (TSVs) in the DRAM stacks reduces the storage capacity of individual dies, though the overall density per square millimeter for the entire package can be high.
Gelsinger's remarks suggest that the current HBM architecture may not be the optimal solution for future demanding computing needs, potentially influencing the design of server and data center solutions.