Kioxia-WD Begins Sampling 332-Layer BiCS10 3D NAND Flash
Kioxia and Western Digital have started sampling their 10th-generation BiCS FLASH 3D NAND, featuring 332 layers. The initial product is a 1Tb TLC memory chip.
The Kioxia-WD alliance has announced the commencement of sample shipments for its 10th-generation BiCS FLASH 3D NAND. Developed collaboratively, the new flash memory technology features 332 layers, with the first product being a 1Tb TLC (Triple-Level Cell) chip.
Manufactured at Kioxia's Fab 2 wafer facility in Kitakami, Iwate, Japan, BiCS10 continues the integration of key technologies like CMOS-Direct Bonded Array (CBA) and Punch Through Spacer (OPS) introduced in the BiCS8 generation. This stacking technology enables higher densities and improved performance.
The initial 1Tb TLC device supports Toggle DDR6.0 and SCA protocols, alongside PI-LTT technology. It achieves an interface speed of 4800 MT/s. The memory boasts a storage density of 29+ Gb/mm², representing a 59% increase over the previous BiCS8 generation.
Significant improvements in power consumption and energy efficiency are noted. Output power consumption is reduced by 34% with a 30% enhancement in read energy efficiency. Input power consumption is down 10%, leading to an 18% increase in write energy efficiency. This advancement signifies progress in developing more efficient and higher-performing storage solutions.