Mouser Releases FPGA AI Suite Version 2024.3
Mouser Electronics has released version 2024.3 of its FPGA AI Suite, introducing new features and enhancements for AI inference on FPGAs.

Mouser Electronics has announced the release of FPGA AI Suite Version 2024.3. This update introduces several new features and enhancements aimed at improving artificial intelligence (AI) inference capabilities on field-programmable gate arrays (FPGAs).
Key additions in Version 2024.3 include support for upsampling and downsampling operations (using the nearest neighbor method) with scaling factors of 2 and 4. Additionally, the dla_compiler command, when used with the --fanalyze-area option, now generates a .ptc file compatible with the Quartus Power and Thermal Calculator (PTC) for power consumption estimations.
The release also brings improvements to model analysis. The Model Analyzer can now identify auxiliary modules that can be safely disabled if not required by a specific graph. The Model Analyzer's .dot graphs have also been enhanced to include more information derived from text reports.
A new architecture parameter, num_lanes, has been introduced to enable parallelism across height for compatible layers. This feature increases parallelism and performance at the cost of increased DSP usage and area. Mouser recommends utilizing this update in conjunction with the DDR-free inference option.