Nvidia revises Rubin GPU specifications, reducing memory and interconnect bandwidth
Nvidia has updated its technical documentation for the upcoming Rubin GPU architecture, lowering HBM and NVLink bandwidth specifications while increasing network capacity.
Updated documentation from Nvidia shows a strategic shift in the design parameters for its future Rubin GPU systems. The company has reduced the HBM4 memory bandwidth for the Vera Rubin superchip from 44TB/s to 38.5TB/s, while the NVLink bandwidth has been adjusted from 7.2TB/s to 6TB/s. Conversely, the scale-out network bandwidth has seen a modest increase to 0.9TB/s.
The adjustments extend to the Rubin GPU SMX modules and HGX NVL8 systems, where memory specifications and NVLink switch bandwidths have also been lowered. Additionally, the company has revised its Vera CPU memory capacity, noting support for 'up to' 1.5TB of LPDDR5X, rather than a fixed standard per processor.
Industry analysts suggest these modifications are intended to ease manufacturing constraints. By lowering the performance thresholds for components like HBM4 memory, Nvidia can likely improve production yields and ensure a more stable supply chain for its next-generation AI hardware, balancing performance targets with component availability.